CSE502
| Course |
CSE502 |
| Title |
Computer Architecture |
| Description |
Instruction Pipelines and Memory Caches to Improve Computer Performance.
Instruction-Level Parallelism . Machines: Superscalar versus VLIW.
Cache and Main Memory Hierarchy Design Tradeoffs. Compiler Optimizations
to Speed Pipelines. Low-Power Computer System Design: Processor, OS,
and Compiler Support. Graphics, DSP and Media Processor Design. Disk
I/O System Design. Interconnections and Networking. Introduction to
Parallel Architecture. Advanced Topics: Asynchronous Microprocessors,
FPGA-based Reconfigurable Computing, System on a Chip, Embedded Processors,
Intelligent RAM and Superconducting Computers.
|
| Prerequisite |
CSE
320 |
| Credit Information |
3 - credits |
| Textbook(s) |
David A. Patterson, John L. Hennessy
Computer architecture : a quantitative approach
3rd ed. San Francisco : Morgan Kaufmann Publishers, c2003 |
| Course Webpage |
http://www.cs.sunysb.edu/~cse502
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